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分享:最新Hotfix_SPB17.20.022_wint_1of1补丁

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发表于 2017-7-10 15:59:58 | 显示全部楼层 |阅读模式
Fixed CCRs: SPB 17.2 HF022
06-16-2017
========================================================================================================================================================
CCRID   Product            ProductLevel2 Title
========================================================================================================================================================
1755789 ADW                DBEDITOR      Checking in HSS Block returns 'Failed to create archive'
1731459 ADW                FLOW_MGR      Cannot open LRM from Flow Manager
1731460 ADW                FLOW_MGR      Cannot open LRM from Flow Manager
1744081 ADW                FLOW_MGR      Error regarding configuration file when trying to open Workflow Manager
1756727 ADW                LIBIMPORT     EDM Library Import fails with java exceptions when merging classifications
1743763 ADW                SRM           Find filter is grayed out when Allegro PCB Editor is opened from EDM Flow Manager
1748399 ALLEGRO_EDITOR     DATABASE      In release 17.2-2016, end caps not visible for certain clines in PCB Editor
1748522 ALLEGRO_EDITOR     INTERACTIV    A component mirrored using the 'funckey' command jumps to (0,0) position when the 'move' command is used on it
1734983 ALLEGRO_EDITOR     INTERFACES    Secondary step model does not stay mapped after drawing is reopened
1753704 ALLEGRO_EDITOR     REFRESH       Refreshing symbols crashes PCB Editor
1493721 ALLEGRO_EDITOR     SHAPE         Voids on negative planes are not adhering to constraints
1711242 ALLEGRO_EDITOR     SHAPE         Route keep out leads to partly unfilled shapes with gaps
1726865 ALLEGRO_EDITOR     UI_GENERAL    Pop-up Mirror command does not mirror at cursor position
1752987 ALLEGRO_EDITOR     UI_GENERAL    axlUIViewFileCreate zoom to xy location not working while in user created form.
1755638 ALLEGRO_EDITOR     UI_GENERAL    In release 17.2-2016, zoom operations using mouse button not working when axlShellPost() is run
1719792 ALLEGRO_PROD_TOOLB CORE          Productivity Toolbox Z-DRC hangs or crashes PCB Editor
1624869 ALTM_TRANSLATOR    CAPTURE       A structure file is required to translate a third-party schematic to OrCAD Capture
1707416 ALTM_TRANSLATOR    CAPTURE       Missing components and pins in the OrCAD Capture schematic translated from a third-party tool
1708825 ALTM_TRANSLATOR    CAPTURE       The third-party translator fails to translate the schematic
1719200 ALTM_TRANSLATOR    CAPTURE       The third-party translator fails to translate all the pages of a schematic
1546070 ALTM_TRANSLATOR    CORE          Third-party to DE-HDL schematic translation fails
1700508 ALTM_TRANSLATOR    CORE          Third-party PCB translator does not work in release 17.2-2016
1699340 ALTM_TRANSLATOR    DE_HDL        Unable to import third-party schematic into DE-HDL using Import menu in PCB Editor
1630379 ALTM_TRANSLATOR    PCB_EDITOR    Third-party translator is not importing clines and vias
1708615 ALTM_TRANSLATOR    PCB_EDITOR    All items of third-party PCB not imported in release 17.2-2016
1758296 APD                DXF_IF        DXF OUT: Rounded rectangle pads mirrored incorrectly
1756040 APD                IMPORT_DATA   The 'die text in' command ignores values after the decimal point
1727206 APD                SHAPE         Merging two shapes results in an incorrect shape
1753682 CONCEPT_HDL        CONSTRAINT_MG Constraint Manager stops responding while cross probing DE-HDL
1721334 CONCEPT_HDL        CORE          dsreportgen not able to resolve gated part on schematic
1747559 CONCEPT_HDL        CORE          Copying a logic symbol without a part table entry results in ERROR(SPCODD-53)
1749644 CONCEPT_HDL        CORE          In release 17.2-2016 Hotfix 019, 'align components' is not working on Windows 8 and DE-HDL crashes
1746910 CONCEPT_HDL        GLOBALCHANGE  Global Component Change unable to identify part data when using schematic pick option
1743572 FLOWS              PROJMGR       Project Manager displays incorrect values in Project Setting
1724124 FSP                DESIGN_EXPLOR Provide TCL command to filter design connectivity window
1719105 FSP                GUI           Tabular sorting not working in FPGA System Planner
1755750 PCB_LIBRARIAN      GRAPHICAL_EDI In release 17.2-2016, unable to delete _N pins in PDV Symbol Editor
1722993 PCB_LIBRARIAN      IMPORT_CSV    Part Developer crashes while importing part information stored in a .csv file
1758856 SIP_LAYOUT         3D_VIEWER     Correct the spelling error in the 3D Viewer Design Configuration window
1755179 SIP_LAYOUT         ARTWORK       PCB Editor crashes when creating Gerber files
1743511 SIP_LAYOUT         MANUFACTURING Package Design Integrity shows non-redundant padstacks in the Redundant Padstacks check
链接:http://pan.baidu.com/s/1jIP0d7o 密码:1zi2
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发表于 2017-8-29 10:31:09 | 显示全部楼层
没有链接地址
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发表于 2017-8-30 01:02:22 | 显示全部楼层

链接:http://pan.baidu.com/s/1jIP0d7o 密码:1zi2
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发表于 2018-2-9 10:26:50 | 显示全部楼层
链接挂了,求再分享一下
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